With the first problem, they can simplify things considerably by paying an ARM tax. The RISC-V tax is less ($0) but then it offers them less as well. If they design their own ISA, well, good luck with that. Also, clouds like tweaks, so one size won't fit all.
With the second problem, there's fab space to be had for sufficient coin. But there's more to manufacturing than filling out a webform and sending a tape with a check.
If they can get past the first two hurdles and actually deliver silicon which is significantly better than Intel's then marketing to the big clouds should be the least problematic.
Gonna take some money and time. Gulati left Google in March.
This investor+customer approach has a history. Yahoo did this with Google (search) and Apple did this with Adobe (laser printers).
Understatement of the year. The number of man hours Intel has sunk into optimizing each of these boggles the mind. And this is coming from someone who worked there for 2 years.
I'd much rather translate from that than create the compiler backend and the entire toolchain.
[1] It's not perfect alas, as there are still many things the compiler knows that is lost in translation, such as the complete static alias sets of memory operations, true range limits on values, etc. For some of this we burn power today trying to (re-) discover at run-time (like the memory disambiguator).
I, for one, would appreciate an explanation of how WASM differs from the original JVM, if someone has a moment.
It’s a transitional step between the current mass market mode of chip productions selling one size fits all, and the way the market is heading towards task specialized hardware.
It made me wonder if it was a VIA spinoff; maybe licensing some of the interdependently developed x86_64 IP they bought with Cyrix from the entire Via C6 era.
Unless there's a minimum friction to migrate, most companies won't make the effort even if they can save a few $100 per server. It takes me back to Intel's VLIW attempt with Itanium/EPIC. Even when they got compilers up to snuff, too many high end tasks (video encoding) either required special instructions or were written in assembly that couldn't easily be ported to EPIC instructions.
Data crunching Fungible is already on that
Distributed services a lot of fan in and fan out some kind of chips that can combine IO networking and moderate general computing instructions can be useful
Massive code data storage
Catching servers?
Overall, I see no reason to take AMD Intel heads on... It's not necessarily anyway, no one needs a third x86 player. We want to have true architecture disruptor...
Nybody want to
NUke them from high orbit?
