There are two lines in the spec summary. The PRU is one, a Cortex M3 is another. It's not unliklely that the SoC indeed has both, intending the ARM for use as a very low power, always-on sensor listener (e.g. the DSPs that handle audio and sensor input on phones so they can wake up the main CPUs for gesture or voice recognition).
Except the datasheet [0] does not list anywhere "Cortex-M3", nor reference any ARM cores other than the Cortex-A8. So if it is there, they are keeping it a deep secret.
What a surprising find! I would imagine Cortex-M3 (with 24 KiB RAM in total) a huge overkill for just power management. And it totally escapes me why the realtime co-processors are using a custom ISA solution rather than just using Cortex-M0/3/4. Would have been great to leverage the mature toolchain for Cortex-M!
