Exactly the first thought I had too. I know extremely little about FPGA development, but three things I noticed that came to mind re: difficulty:
- Alex used a Xilinx FPGA, the MiSTer uses an Altera Cyclone - dunno how portable code (if that’s even the right term for e.g. VHDL) is from one to the other. I know the MiSTer has a light framework for cores to plug into to get input handling, scalers, etc.; so maybe it’s more a matter of porting to the framework…?
- Alex mentioned the SCC didn’t have a pre-made FPGA core so they used a real one. I don’t think serial handling would be critical but I do suspect you’d at least need a dummy to get the OS to pass self-tests and boot properly. Possible that maybe the Mac core has already handled this, though.
- What little I know of RAM and the MiSTer would lead me to think the SDRAM card a MiSTer setup typically needs wouldn’t be a problem over the SRAM Alex used, and that either the framework or the wiring of the RAM card handles the details for you - but I definitely don’t know that.
On the plus side I suspect/hope maybe a bunch of stuff from the classic/original Mac core could be borrowed to get it up and running.
There’s definitely plenty of cores that haven’t yet been developed on the MiSTer… for instance there isn’t a color 68K Mac core, only recently have people started on 3D0 and CD-i and Apple IIgs cores, the Saturn core was pretty shaky until a recent overhaul, etc. I think what’s there is just a function of what was either already developed for an FPGA or what had the biggest demand from their respective communities.