Not my field so please forgive a possibly obvious question: That seems true regardless of the pixel count (?), so for that process why wouldn't power also be proportional to the pixel count?
I notice I'm saying 'pixel count' and you are saying 'pixel density'; does it have something to do with their proximity to each other?
I had back then developed what was perhaps the most sophisticated system-level model for display power, including refresh, illumination, etc., and it included all those terms for capacitance, a simplified transistor model, pixel model, etc.
I did not carefully distinguish pixel density vs. pixel count while writing my previous comments here, just to keep it simple. You can perhaps imagine that increasing display size without changing pixel count can lead to higher active pixel area percentage, which in turn would lead to better light generation/transmission/reflection efficiency. There are multiple initially counter-intuitive couplings like that. So it ultimately comes down to mathematical modeling, and the scaling laws / derivatives depend on the actual numbers chosen.
Addition:
Another important point -- Column line capacitances do not necessarily need full refresh going from one row of the pixels to the next, as the image would typically have vertical correlations. Not mentioning this is another simplification I made in my previous comments. My detailed power model included this as well -- so it could calculate energy spent for writing a specific image, a random image, a statistically typical image, etc.
Am I mistaken? Is it feasible that there could be (analog?) charge memory to hold each sub-pixel at a stable partial alignment, without the high-frequency driver signals being reasserted?
I have understood the reason MIP LCD works is that there is a RAM bit embedded in each sub-pixel, so it can locally maintain a static, binary charge state without dynamic refresh. There is no high-frequency oscillating circuit to provide this persistence. The only way I could see this work for increased color depths would be if there were a recursive hierarchy of sub-pixels, each with that 1-bit state. E.g. a series of 1/2, 1/4, 1/8, ... area sub-pixels could encode a linear color space, with all the emission areas adding together to physically embody the DAC.
Short answer: Yes.
Active matrix panels use transistors as switches, typically one transistor per (sub-)pixel. Only a single row of (sub-)pixels is addressed at a time, i.e., the switches are 'on' (conducting) only for one row during the refresh cycle. The pixels on the rest of the panel maintain a floating charge as the switches are in off state. The charge is held, except for leakage currents (more on that later). All this is just like DRAM.
You may think then the voltage on these disconnected pixels would also be near-constant during this disconnected phase. However, the LC (Liquid Crystal) is usually mechanically slower to react, keeps adjusting to the charge placed during the ON phase, and its capacitance changes as LC adjusts. So the voltage changes somewhat.
For OLEDs, it needs constant currents. So AFAIK, the charge is held on the input of an additional transistor, which turns it into a current through the diode.
Often a static capacitor is explicitly added to each pixel to (a) counter the leakage current, and (b) hold the voltage better for LC where the capacitance changes.
The time available to write a single row is frame time (or field time) divided by the number of rows. That is often very small (e.g., 16 ms / 1000 rows = 16 us) as compared to the LC response times (say > 1 ms). Since the LC pixel cap is not constant, the value written within the short ON time changes, and gets corrected only when a new field/frame is written. This implies motion artifacts even with 1 ms LC response time, since the next field/frame may come only after say 16 ms (1/60 Hz). A smarter drive scheme could anticipate the capacitance change and supply a pre-adjusted voltage to compensate.
Now for the charge leakage: Leakage current pathways are usually not from the LC, but transistor itself! Leakage currents in (sub-)pA range are normal. And this is where oxide transistors come in. E.g., IGZO. The leakage current is next to zero.
So the device will hold the charge for much longer. It may even be more than a second, however, polarity-reversal requirement may be faster (I am not sure).
In one experiment a colleague performed, a mirasol passive matrix display was disconnected altogether from the side electronics, and it held the image intact for days. No transistor in a passive matrix display and practically no leakage!
>> I have understood the reason MIP LCD works is that there is a RAM bit embedded in each sub-pixel, so it can locally maintain a static, binary charge state without dynamic refresh.
Yes. The memory in pixel is like going from DRAM to SRAM. No (external) refresh needed anymore as the RAM cell stays connected to the power supply and easily counters leakage currents (including its own transistors).
The cost, some of the pixel area may be lost for the circuitry. May be some loss of yield because of more complex circuitry.
Another cost, as you wrote, it's binary now. (Assuming you can't afford to include more bits and a DAC in every pixel)
>> There is no high-frequency oscillating circuit to provide this persistence.
There's no 'oscillatory' stuff needed. The persistence issue is just because of charge loss from leakage. So you need to bring the same voltage again (unless the image changes).
>> The only way I could see this work for increased color depths would be if there were a recursive hierarchy of sub-pixels, each with that 1-bit state. E.g. a series of 1/2, 1/4, 1/8, ... area sub-pixels could encode a linear color space, with all the emission areas adding together to physically embody the DAC.
Yes. And this isn't just science fiction, as in, this has been done.
It need not be just space-wise though. It could also be time-division with such ratioed intervals. Or a combination of space and time. E.g., two subpixels, and then two temporal fields (I call them bit-planes) yielding four bits.
Again, these things are actually done. DLP projectors use temporal fields.
Hope this helps.
