I remember reading the tinfoil hat theory about three-letter agencies making low-quantity high-cost chips at incredible process sizes in order to break encryption. I doubt that's still as viable today as it was before leakage currents started dominating, but it was an impressively plausible theory.
IIRC EUV development picked plasma over synchrotron because plasma projected to be cheaper, even though technically synchrotron had more benefits. Queue many, many years of solving for technical challenges for LPP and now commercialized EUV machines cost 200m, 400m for next high NA. Which is about the cost of multiple small or single medium size synchrotron facility. It's amazing plasma EUV works, but it's also a failure in the sense that it is FAR less economical than originally envisioned, which explains why particle accelerator route is still being worked on.
I can bet there are superconductor/photonics/topologically different/strange memory/smaller process size prototypes around.
Right now we are getting to the limits of transistor sizes, but even a couple of years ago experimental prototypes of smaller process size were developed years before mass production.
Scanning an electron beam, repeatedly over an entire waffer would take forever. So instead we do it once, to make the mask, and that mask is then used over and over to expose the waffer.
This is a bit little injection molding: the mold is very expensive and made with a far better manufacturing process than the plastic pieces that it will eventually produce, but this is the price to pay for high volumes and low costs.
1.5B transistors in a current intel core chip
300 die per wafer
150 wafers an hour
That means each litho tool prints 6.75 x 10^13 “transistors” per hour. In more useful units, that’s 18.75B transistors per second.
Drawing them one line at a time is technically feasible but…I’ll bet you are talking single digit DIE per hour if that.
And that is for one layer of lithography. I’ve seen estimates from 5-20 layers of lithography using EUV tools at the 3-7nm nodes. So the time scale is even more warped.
My startup is trying to do this, and it is a fiendishly hard problem.
https://en.wikipedia.org/wiki/Electron-beam_lithography
Edit: Confused SEMs and STMs, but the principle described above applies to both.
https://en.wikipedia.org/wiki/Free-electron_laser
or some similar kind of device that turns the momentum of electrons into light. I'm a little surprised that they didn't try something like a FEL first instead of that terribly problematic device that uses highly inefficient lasers to blow up tin droplets, itself a high-loss process that produces contamination and resulted in years of delay developing materials for
https://www.asml.com/en/news/stories/2022/the-euv-pellicle-i...
Interestingly China has been continuing working on the synchotron based EUV litho idea (in addition to work to create domestically built tin laser EUV lithos machines).
https://www.asianometry.com/p/euv-lithography-but-with-a-fre...
Things would get a bit radioactive at those energies, though.
Very cool you visited ASML. Anything exciting/interesting you'd be willing to tell the class?
- They need 3 Boeing 737’s to ship an EUV machine. - We talked with one guy who’s responsibility it was to design one of the calibration points the machine uses to find it’s zero position. This left me amazed that they’re able to ship a machine halfway across the world, re-assemble it and calibrate it again to such accuracy. And! On top of that, make it reproducible over different machines!
