What's the avg spacing on atoms in a silicon matrix anyway? Something on the order of 0.2nm (2A)? So are we now nearing a point where 1 extra atom is 10% error in a single dimension?
Would be grateful if someone who actually understands this stuff would care to illuminate my speculation further?
2nm is a commercial name that doesn't have much to do with actual nanometers. The actual distance between transistors (gate pitch) in the 2nm process is expected to be 45nm.
I'm currently investing in Intel as a way of hedging the risk of Chinese invasion of Taiwan. Once the TSMC factories are bombed the competition for Intel will basically disappear overnight.
Intel is using angstroms, so their "2nm" node is "20A" and the "1.8nm" node is "18A". These of course still don't have any more relationship with the physical size of the transistors than previous Intel, TSMC, or Samsung nodes but it keeps it relatively clean without needing a decimal point in the name.
Sounds like bullshit has replaced a once useful physical measurement. They should've found a new, real and objective measurement or just given up and used a date or arbitrary version scheme.
3 and 2 from TSMC are divorced from the actual component spacing - they’re all pretty close in terms of actual technological advancements, they just don’t all use the same marketing for process names.
Intel 4nm ( Meteor Lake ) is coming out soon ( in a few days time ), Intel 3nm expected next year. And Intel 2nm in (late) 2025. So in a similar time frame as TSMC.
I hope Intel and Samsung will have much success, because TSMC betrayed customers by exclusively providing all top-level manufacturing capacity only to Apple and handling anyone else as a second class citizen.
TSMC's success is partially that they're the only company who promises not to compete with their customers, because they don't make their own chips like Intel and Samsung do.
