Bitgrid[1][2] is a continuation of an idea I've been carrying around since the 1980s, and tweaking from time to time. If I can maintain focus long enough, I intend to learn RTL, VHDL or Verilog well enough to get it entered in one of the Google open source chip shuttles. I think this approach to computing if applied to neural networks may offer a cheap way to get far more compute, perhaps exaflop performance out of a single chip.

It's an FPGA without routing hardware, which on the face of it, is the stupidest thing to do. However, because of the clocked nature of the bitgrid, you all data only has to travel to neighboring cells, so lines will be short, and clock rates should be able to be up in the gigahertz range. Instead of worrying about how quickly you can get a signal from one side of the chip to the other, the latency will be 1/2 of the number of cells across, if the signal takes a straight line.

However... everything along that path can be compute, and routing should be trivial. It avoids the trap with GPUs where they are Turing complete, thus hard to reason about. Like an excel spreadsheet, you can track dependencies, and know exactly where a given bit came from. The chip as a whole, on the other hand, is Turing complete.

If anyone knows how much energy in FemtoJoules an 4 bit latch and a 4 bit input LUT take up, and a static ram cell... that would help in estimating the real world power consumption/feasibility of this thing. I can't find a good answer anywhere.

[1] https://github.com/mikewarot/Bitgrid

[2] https://bitgrid.blogspot.com/2005/03/bitgrid-story.html