undefined | Better HN

0 pointstwoodfin2y ago0 comments

The delays introduced by the repeated PUSH/POPs would be quite short, even on the 8088. How would you propose such making high-precision waits for the external x87 chip? (Assuming they were needed at all.)

0 comments

3 comments · 1 top-level

benj1112y ago· 2 in thread

if it was just 100 push pops, that would be fine for a delay.

if its 20 push pops foo 10 push pops bar foo 20 push pops foo foo 10 push pops.

to achieve the same delay.

its like: a=1 b=2 result=0 print 1+2 return

it isnt wrong, but its indicative of someone who doesnt understand whats going on. you wouldnt describe it as good code.

peterfirefly2y ago

A non-obvious reason for using PUSH/POP instead of a loop could be to generate as many different bus cycles as possible.

We get instruction fetch, memory read, memory write, and probably idle -- and an I/O write (0F0h). We should get the idle cycles because PUSH/POP instructions are single-byte and require a little time for decoding and the 286 BIU fetched 2 bytes at a time so the instruction buffer should get full.

Maybe they wanted that on top of the delay (which is obviously there because they didn't want to use the FWAIT instruction) -- maybe some 80287 chips had internal state machines that could get confused and needed some help?

benj1112y ago

It /could/ be that.

But I think that's an overly charitable interpretation based on the evidence.

If the source code turns up with detailed comments about why it's like it is. Fine. In the absence of that, I'm not buying it.

1 more reply

j / k navigate · click thread line to collapse