* very cash heavy(EDA tools, IP license, engineer wage, fab money,etc)
* very challenging technically(balance of computation, power, size,etc)
* lots of work needed on the software side(compiler,SDK,optimized libs,etc)
It is in a totally different world comparing to MVP or the lean startup concept.Hardware(circuit board related) startup is already challenging(cash heavy, logistic challenges,etc), chip startup is 100x more. The later is about more than one hundred people with hundreds of millions investment to just get started.
I 100% agree with your other points though. It costs an absolute fortune, and everyone always underestimates the software effort. It's probably 5-10x the hardware effort, depending on what your chip does.
Also another thing I didn't anticipate is how backwards all the tooling and people are in the chip design space. CI is a novel concept. I'm sure there are companies not using version control. Everything runs on TCL which is on par with BASIC. SystemVerilog is not a good language (though it does at least have an amazing reference manual). The standard verification method (UVM) is ok from an actual verification point of view but basically a who's who of worst practices from a programming point of view.
Maybe it's different elsewhere but I was amazed how much convincing I had to do to get people to adopt practices that are just taken for granted in the software world, like auto-formatters. There are a lot of luddites.
The only "ok this is actually pretty good" thing I've seen is formal verification which is basically magic.
In chip design, there are a lot of non-software people who have been burned by software people. Given the amounts of money flying around, there are always a lot of charlatans looking to take a chunk out of you.
We used to do CI--a complete CI on our chip took 4 days. The library took 3 weeks to go through CI. Version control sucks unless your data is text--generally that's only your Verilog. Tcl is a decent enough language--the problem is that the stuff you write is no more than a one off and the real product is your chip--so nobody is going to reward you for a "good" script in any language. SystemVerilog wasn't meant to be a good language--it's an EDA vendor lockin meant to extract maximal money from hardware people.
And I've seen more verification in hardware before shipping a product than I EVER have seen in any software role. Yes, even those with "good" testing.
Tell me more about this place where people don't get hung up on how I indent my comments.
https://sambanova.ai/ - Enterprise AI and dataflow-as-a-service for established moodels
https://www.cerebras.net/ - AI accelerator, trying to compete with NVidia
https://www.graphcore.ai/ - Another AI accelerator company - UK based
https://femtosense.ai/ - Sparse NNs on very low power chips - cool hardware and software challenges
https://sima.ai/ - ML accelerators for embedded applications
https://ambiq.com/ - Not AI, but low power chips for wireless using some fancy tech that reduces energy leakage
There are dozens more, these are just the ones I've heard of.
https://www.esperanto.ai/ - RISC-V based Tensor computes chip, Founded by Intel Hybrid Parallel Computing Vice President Dave Ditzel.
https://www.furiosa.ai/ - AI accelerator company which show good results in MLPerf benchmark.
https://groq.com/ - From the team that built the original TPU at Google
https://lightmatter.co/ - Light tubes instead of copper
With enough funding, it's quite a good thing to work on. With Moore's law dead, the odds of success of weird chips got much better.
Jim Keller: Moore’s Law is Not Dead: https://www.youtube.com/watch?v=oIG9ztQw2Gc
I've jumped around it and didn't see any mention of cost/transistor going down. So I assume that isn't a respected engineer saying the opposite of what all the data clearly shows, and instead it's a hyped title to a talk about something slightly different.
Batteries are not on Moore's Law and more of our systems are battery powered so portable electronics is not on Moore's Law. Transistors are not cheaper if you can't turn them on.
Power goes as area squared and voltage squared. We can't turn voltage down any further and cheaper transistors mean area goes up. This means that most computation chips are fairly close to their thermal limits. Transistors are not cheaper if your cooling solution costs 10x more.
https://www.google.com/search?q=chip+startups
I'm pretty impressed with the number of AI/neural network semiconductor startups right now.
A lot of things you see here could've been 'Googled', but what's the fun in that?
- https://www.sifive.com/ - RISC-V related company
- https://www.cerebras.net/ - Cerebras (AI accelerator)
Both of categories has other players, these are just two notable examples.
- ONiO: Single-chip microcontroller with builtin energy harvesting and radio communication, enabling IoT devices without battery or dedicated charging.
- Ascenium: Software-defined CPU without an instruction set. Highly parallel architecture with extensive compiler integration.
- Disruptive Technologies: Single-chip compute + sensing with built-in battery for 10+ year operation.
This is marketing BS if I've ever heard it. Their "instruction set" is LLVM. They're doing nothing more than what Transmeta (dynamic/programmable ISA) or Lisp/Arm-Java machines (running higher level code at a machine level) did before them.
I'm designing an affordable electron microscope for high schools and small businesses. While that doesn't sound like a chip startup, the long term goal is to create multipurpose tools that enable semiconductor fabrication with electron beam milling and chemical vapor deposition.
It would represent a true architectural revolution if it ever actually came to fruition. Lots of past discussion on HackerNews over the decade(!) it’s been under development.
https://www.uhnder.com/ - radar on a chip
HTTPS://wwww.fishnandsemi.co.uk/
https://www.linkedin.com/jobs/view/3108025120/?refId=iI7RO%2...
We currently target AWS F1 FPGA instances, and custom ASICs are on our roadmap.
hn@ir.design
It's so costly I don't know how other related startups can survive though.