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0 pointswillis9363y ago0 comments

>The AVX-512 instructions were never added to the efficiency cores because it would use way too much die space and defeat the purpose of efficiency cores.

Isn't the purpose of efficiency cores to be more power efficient? It's more power efficient to vectorize instructions and minimize pipeline re-ordering.

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mastax3y ago

Power and area efficient. You can fit 4 E cores in the area of 1 P core. Adding AVX-512 to the E cores would significantly hamper that, though I don't know by how much.

willis936OP3y ago

I've been thinking about this. I think the idea of heterogeneous extensions is nuts. Intel is right to either have it on all cores or none. I think the die space would be worth it to actually have more high performance, efficient vector extensions available. Considering how many E cores are being crammed into raptor lake, I hope Intel will decide to add AVX-512 into E cores in time.

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0 pointswillis9363y ago0 comments

>The AVX-512 instructions were never added to the efficiency cores because it would use way too much die space and defeat the purpose of efficiency cores.

Isn't the purpose of efficiency cores to be more power efficient? It's more power efficient to vectorize instructions and minimize pipeline re-ordering.

0 comments

mastax3y ago

Power and area efficient. You can fit 4 E cores in the area of 1 P core. Adding AVX-512 to the E cores would significantly hamper that, though I don't know by how much.

willis936OP3y ago

j / k navigate · click thread line to collapse