I don't see why interrupts wouldn't work without hardware debouncing.
$2 micros are many MHz. All it has to do is save/compare one timestamp per interrupt.
So lets do some back-of-the-napkin calculations and say it takes 1us to store/compare the timestamp, a switch transitions 50 times per press on each change of state, and a person is typing at 100wpm (lets say 600cpm = 10cps).
I think these are pretty conservative numbers, 50 bounces sounds like a pretty crappy switch to me.
So 1000 transitions per second which would take 1ms, which means 1/1000th of the time is spent servicing the interrupts.
It's not going to cause a problem unless the coding is very inefficient.