undefined | Better HN

0 pointsbogantech4y ago0 comments

Indeed, I'm not sure how they came to the conclusion that stronger pull-ups would reduce power draw. If anything they'd increase it.

And it won't affect MCU power draw at all as PS/2 is open collector - the MCU is never driving the data or clock high at all.

0 comments

2 comments · 1 top-level

ComputerGuru4y ago· 1 in thread

The author did not say that the resistors decreased the power consumption, or if they did, I missed it. The stronger current draw on the IBM isn’t exceeding the USB power limits but it is causing a voltage droop on the mobo’s shoddy regulators or PS/2 interface circuitry that is rectified by effectively reinforcing the pull-up circuitry to boost the signal integrity by adding a second pull-up in parallel with the existing.

bogantechOP4y ago

I don't think voltage drop has anything to do with it.

The voltage was high enough to drive the MCU so it's more than enough for the 2V threshold voltage of both sides.

PS/2 is open collector so when idle the signals will settle at VCC regardless of the pull-up value

The "fractionally lower voltage high" can only have been very close to 5V.

Adding stronger pull-ups would have given faster rise times and stronger drive so either the rise time was too slow for the superio or the extra juice helped protect against noise.

The author mentioned current draw but it has nothing to do with it imo

j / k navigate · click thread line to collapse