The P550 pref / area based on Intel 7nm equivalent to TSMC 4nm / 3nm that is better than the ARM Cortex A75 released in 2017 on TSMC 10nm.
Number using Intel CPU's 7nm, normally Custom Foundry of IFS tends to offer lower density but higher flexibility. So this is more like a best case scenario.
I am also suspicious of the Intel 7nm number. There are some possibility this is actually an Intel 10nm renamed to 7nm for custom foundry partners. ( Intel 10nm being equivalent to TSMC 7nm )
For example, the exact same verilog, on the same process node at the same foundry, can synthesize to very different areas depending on the standard library used. They come in a lot of varieties with a lot of different trade offs.
For even more detail, the SkyWater130 node, which has been popular on HN lately and is public so we can actually post links to it, has 6 different mappings that are possible. Note, some are called high speed, or high density, etc. You get the idea.
https://skywater-pdk.readthedocs.io/en/latest/contents/libra...
I wonder what we'll see as a result of this partnership with Intel:
SiFive also confirmed that the IFC RISC-V application development platform will use the Performance P550 core on Intel's 7nm Horse Creek platform.
Link: https://www.phoronix.com/scan.php?page=news_item&px=SiFive-P...
Lack of competition today does not belie there never being competition. I would argue that anti-trust should be taken against killing/buying your competition when it's still in the womb, see Instagram-v-Facebook, WhatsApp-v-Facebook, InstagramStories-v-snapchat
Similarly, shipping RISC-V chips are currently six years behind ARM's A53.
The P550 closes the gap to ARM to 4 years, and to Intel probably about 12-15 years with P550 and A15 both most similar to Core 2 in the Intel line-up.
That's a highly-usable level of performance, especially when paired with more modern RAM, SSD, and GPUs than were available in Core 2 systems.
Though there other organisations doing things, e.g. the PULP Platform: https://news.ycombinator.com/item?id=23768080
I hope that the acquisition doesn't go through, more competition would be great, and perhaps within a decade a wider commercial RISC-V ecosystem could emerge.
RYF certification decreases freedom, it doesn't increase it. The qualification for RYF is that the user not be able to see any blobs, not that they don't exist. As a result, manufacturers hide and bury the blobs in order to achieve compliance. Meanwhile, more open devices with optional replaceable blobs are denied certification.
Thread on just how out of touch the FSF is with all this, and how they do not support real, objective user freedom: https://twitter.com/marcan42/status/1377899929209774081?s=19
So what makes this better than an ARM A78 or X1?
[1] https://lwn.net/ml/linux-kernel/CAAhSdy0F7gisk=FZXN7jmqFLVB3... [2] https://lists.riscv.org/g/tech-privileged/topic/risc_v_h_ext...
One of the aspects folks were looking forward to seeing is the specification of the 2-stage IOMMU, which S-mode or other parts of the spec don't address per the lengthy discussion on [2]. Thanks.
[1] https://github.com/riscv/riscv-isa-manual/commits/master/src... [2] https://arxiv.org/pdf/2103.14951.pdf
Would you please provide a direct link to some of those patents or discussion?
The thread at [1] if I read it carefully does not mention patents, but seems to be a prelude to submitting the RISCV kvm stuff to staging that Greg KH complained about a while ago.
(Yes, I appreciate I may not be the intended audience for that board, but I would still like to build a RISC-V based desktop one of these years)
You don't buy a HiFive Unmatched because it's faster or cheaper than an ARM-based board. It's obviously not.
You buy a HiFive Unmatched because you specifically want to run or create RISC-V software because you believe that will be important in the future and the Unmatched is currently the highest performance way to do that, certainly for single-threaded code or for running a full desktop OS with accelerated GUI.
You get get more overall multi-threaded RISC-V performance running QEMU on an x86 machine with 8+ cores. That's probably going to cost more. But you might already have one that's not heavily used.
Hope intel doesn't infect it with IME.
"Evolved from the previously announced SiFive U84 microarchitecture,"
The U84 was a from scratch, in-house design.
Expect chips in 9 to 12 months, minimum.
