I decided to learn Verilog after reading of a different division. Namely that VHDL is the preferred option of defense industry applications in the US, Verilog preferred in non-MIC business. Given the advantages of VHDL over Verilog looked less than overwhelming and Verilog has some advantages of its own, (verilator, seemingly more RISC-V cores in verilog, open-source tool chain looks closer to being useful to me etc.) That's the call I made. It looks like it's not so hard to switch from one to the other if you need to do that though.

Can confirm was taught vhdl in my robotics master's degree this year, studying in Europe