Note that there isn't a single widely accepted way to say who has the better density, but this table sums up the various metrics pretty well.
https://www.semiwiki.com/forum/content/7544-7nm-5nm-3nm-logi...
And: https://wccftech.com/analysis-about-intels-10nm-process/
tl;dr: Intel 10nm gets 106.1M transistors per mm^2. TSMC 7FF gets 96.49. Intel 10nm has an HD SRAM cell size of 0.0312 micrometers. TSMC 7LP is 0.0270.
Intel gets a few more transistors per area, TSMC gets more SRAM per area, but on balance, they're pretty similar. From the second article:
"From figure 3 the 4 processes have similar overall process density. GF has the smallest CPP x M2P x Tracks, Intel has the highest MTx/mm2 value and Samsung has the smallest SRAM cell size. The size of a design in each of these processes will therefore be design dependent and I would not judge any of the four processes to be significantly denser than the others. In terms of relative performance, we have no way to judge that currently."
[Note: Updated this post to quote the TSMC numbers instead of the GF numbers, since TSMC is shipping and GF has pulled the plug on 7nm]
(in general, cache speed is more affected by size, and that's an architectural decision -- see, for example, Intel's move to a 1MB L2 in Skylake-X instead of a 256KB L2 (11 cycles -> 13 cycles, but Intel did a lot of work to try to speed up the cache to reduce the pain)).
But it would be pretty quiet on here if people only talked about what they actually know.
There was a claim made, someone asked for evidence, and then a third person provided the evidence. Done. This is a good way for discussions to work. What would really kill the discussion is if people stopped and gathered evidence first, and compiled it into every comment they made. I trust people are skeptical enough not to believe garbage, and if they’re curious they can ask questions or do additional research themselves.
