Another worthy contender to be rehabilitated is DEC Alpha. Indeed, the Sunway Taihu Light supercomputer (fastest the on TOP500 list) uses the Sunway SW26010 which is based on the Alpha 21164.
Seeing that Sunway TaihuLight still uses DDR3 I wonder how much power they could save by going with DDR4 and it's lower voltage.
It's cool to see so many older ISAs coming back.
Open ISA and a full open source implementation by MIPS themselves?
> High code density compared to other 32-bit RISC ISAs such as ARM or MIPS[8] important for cache and memory bandwidth performance.
Companies are not going for ARM just to license professor ISA's. They also license and value the underlying efficient and high performance architecture ARM has developed.
What can happen with RISC-V is that there are several competing IP companies that develop competing RISC-V architectures and ask royalties and license fees for their IP. This competition can bring down the cost somewhat. If ARM royalty is 1.5% today, the cost may be 0.77% in the future. It's also possible that one company will dominate others with superior design, price and foundry connections. That company might be ARM, AMD or Intel.
Depends on the company. Apple, Qualcomm, Samsung, AMD and Nvidia in fact do go to ARM just to license the ISA and implement the CPU entirely on their own. However, the ARM implementations are licensed by a whole lot of smaller companies. The bigger players are thus pretty much forced to forever chase ARM's changes to the ISA and implement these. I doubt they mind ARM's price but I suspect that they might be concerned about ARM's influence.
One big change from RISC-V, if it materializes, would be a standard ISA not controlled by a single company like ARM, and not evolving through a knife fight between a few companies racing to extend it, like x86. Will it materialize? Not sure which way I'd bet.
Apple others you mention have an architecture license agreement with ARM. It means that they can develop their own cores but they must have full compliance with the ARM architecture.
Does RISC-V require fully compliance? If not, RISC-V might be evolving through a knife fight between a few companies racing to extend it just like x86. When one company gets large market share, their extensions become de facto standards.
It does look like it has 3 potential entry points. There is already a microcontroller product from hiFive. lowRISC appears to be targeting the smallish SOC market. Then whoever might target more general purpose processors.
The RISC-V project is now 7 years old. Remember that the 6502 and its supporting hardware went from proposal to final silicon in 2 years. And that was done using a hand drawn layout.
This chapter is a placeholder for a future standard extension to provide bit manipulation instructions, including instructions to insert, extract, and test bit fields, and for rotations, funnel shifts, and bit and byte permutations.
EDIT: coherence -> consistency (sorry)
tgragnato wasn't clear enough to be certain about what he/she has in mind, but the RISC-V ISA specification -- as presently written -- has been shown to have memory consistency flaws. This emerged in April when Princeton published their TriCheck findings. RISC-V foundation has since responded by promising revisions to the ISA specification to close the holes.
https://www.electronicsweekly.com/open-source-engineering/ri...
https://www.electronicsweekly.com/news/design/eda-and-ip/ris...
Linux is something that you can download from kernel.org, compile it and bring it up over night. It's a package with a bunch of scripts that compiles a working kernel for your machine. All the work is already done for you.
RISC-V, on the other hand, it is just a document describing an ISA. It is far different from a working implementation.
RISC-V might shine on micro-controllers and on power management control units, since those applications are more simple and more affordable to implement from scratch.
But on high-end applications, it will be no different from ARM's path. Implementing an high performant CPU costs money, someone will have to cater those costs, either by hiring a full team of highly specialized engineers (which will cost a bunch of money) or by licensing to third parties (which will also cost money through licenses or royalties).
If RISC-V is going to go anywhere, it's going to have to start with hobbyists and RaspPi-like devices.
The two 'cons' that really need to be addressed:
* Average consumers need /access/ to purchase working solutions (which means some prosumers and some developers will).
* Working solutions probably need to include: DisplayLink, USB, Ethernet, and /maybe/ WiFi (the later two /could/ just be USB devices) ports on the hardware. Standard bulk IO (like SATA, PCI(e) bus) would be nice to have, but not required.
RISC-V Is just open source ISA, hopefulĺy without any patent issues.
Nobody is going develop open source high performance RISC-V processor architecture IP and give the design away free. You pay licenses and royalties just like before.
THAT is what will drive the network effect for success, low prices, and making it a commodity that can be worked on outside of simulated environments.
Remember the ARM started in the 1980s was solid but not a breakout architecture until the early 2000s. The x86's roots lie in the 70s and it took a killer app (IBM PC) to make it dominant. GCC took about a decade to get any traction.
So it's early days for RISC-V
But it specifically says "same model as Linux", and that bothers me because RISC-V is not an operating system, and I'm not sure that Linux's business model is appropriate here...