RISC-V is a flexible and configurable architecture, with support ranging from small MCUs to 128-bit ISA which nobody else have yet (for a general-purpose ISA) to tagged memory (which failed to rule the world in 1970ies but now might be just used when gives benefit).

Those FPGAs of course run an MCU variant of RISC-V (as we started with talking about Arduino), e.g. https://github.com/cliffordwolf/picorv32